By Jordi Cortadella, Alex Yakovlev, Grzegorz Rozenberg
This LNCS state of the art Survey is dedicated to the quite outdated and famous behavioral paradigm in computing, concurrency, and to the ways that concurrency is exhibited or may be exploited in electronic units. The 9 chapters provided are geared up in 4 elements on formal equipment, asynchronous circuits, embedded structures layout, and timed verification and function research.
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Additional info for Concurrency and Hardware Design
Sun Microsystems Laboratories is gratefully acknowledged for their ﬁnancial support. References  Igor Benko. ECF Processes and Asynchronous Circuit Design. pdf, 1999. 4  Igor Benko and Jo Ebergen. Delay-insensitive solutions to the committee problem. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 228–237. IEEE Computer Society Press, November 1994. 2  Tomaso Bolognesi and Ed Brinksma. Introduction to the ISO speciﬁcation language LOTOS.
Each symbol that the two processes have in common is either an input or an output in both processes. In other words, in a speciﬁcation composition an input remains an input and an output remains an output. The second and main diﬀerence between network composition and speciﬁcation composition lies in the handling of progress requirements. The network composition requires progress if and only if at least one of the processes requires progress. The speciﬁcation composition requires progress if and only if at least one of the snippets requires progress and if the progress requirements can be satisﬁed.
The following program describes the behaviour of the environment, as the parallel composition of three sub-programs (processes), one per channel: L = forever do rL/aL end Z = forever do rZ/aZ end D = forever do rD/aD end L par Z par D The following program, named ADFAST, describes the behaviour of the controller: pushback aL ; forever do aL/rL,rD,rZ ; aD/- ; ( aL/rD par aZ/rZ ); aD,aZ/rL end Note that pushback aL means that an acknowledgement on L is initially available to the controller, so it is able to start by issuing requests on all three ports.
Concurrency and Hardware Design by Jordi Cortadella, Alex Yakovlev, Grzegorz Rozenberg